124 行
4.8 KiB
Python
124 行
4.8 KiB
Python
# -*- coding: utf-8 -*-
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u"""给风扇那一窝重排后的 **GND 脚补过孔**（扎进 L2/L3 整层地）。
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/c/Python314/python .claude/r2/fan_gnd_vias.py # 只算 + 报告
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/c/Python314/python .claude/r2/fan_gnd_vias.py --push # 下发
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## 为什么要单独一个脚本
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`route_base.plane_vias()` 是**全板口径**（给所有 GND 贴片焊盘打孔），直接调会在整块板上
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重打一遍孔；而 `repair_base.py` 只补信号网、根本不做平面网扇出。
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于是 2026-09-12 重排之后实测：22 件里有 **9 只 GND 脚新位置底下没有孔**
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（原来的孔还留在旧脚位上，成了孤立的缝合孔）。这种漏法 DRC 不报、
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`board_check` 也只会说「GND 靠铜面成网」，要靠这一支单独查。
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落孔点：焊盘中心优先；中心放不下就在焊盘外圈按 0.25 网格找一个既不压异网铜、
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也不压别的孔的点，离本焊盘边不超过 `MAX_OUT`（太远就不是这只脚的回流孔了）。
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"""
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import io
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import json
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import math
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import os
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import sys
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sys.stdout.reconfigure(encoding='utf-8')
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HERE = os.path.dirname(os.path.abspath(__file__))
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sys.path.insert(0, os.path.dirname(HERE))
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sys.path.insert(0, HERE)
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import fp_edge # noqa: E402
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import place_base as PL # noqa: E402
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MIL = fp_edge.MIL
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PCB = '7b9524b6aaf6f235'
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VIA_D, VIA_HOLE = 0.6, 0.3
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CLR = 0.20 # 孔到异网铜
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DRILL = 0.25 # 钻孔到钻孔
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MAX_OUT = 1.2 # 落孔点离焊盘边最远多少
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STEP = 0.125
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def seg_d(px, py, ax, ay, bx, by):
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dx, dy = bx - ax, by - ay
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L2 = dx * dx + dy * dy
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t = 0.0 if L2 < 1e-12 else max(0.0, min(1.0, ((px - ax) * dx + (py - ay) * dy) / L2))
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return math.hypot(px - (ax + t * dx), py - (ay + t * dy))
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def main():
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cu = json.load(io.open(os.path.join(HERE, '_base_fan_input.json'), encoding='utf-8'))
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pads = json.load(io.open(os.path.join(HERE, '_base_pads.json'), encoding='utf-8'))
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segs = cu['segs']
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vias = [(v[0], v[1], v[2]) for v in cu['vias']]
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gnd = [p for p in pads if p[0] in PL.FAN_REFS and p[7] == 'GND']
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print(u'这一窝的 GND 脚：%d 只' % len(gnd))
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def free(vx, vy, net='GND'):
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for s in segs:
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if s[6] == net:
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continue
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if seg_d(vx, vy, s[1], s[2], s[3], s[4]) < VIA_D / 2 + s[5] / 2 + CLR:
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return False
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for p in pads:
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if p[7] == net or p[6] == 12:
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continue
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dx = abs(vx - p[2]) - p[4] / 2 - VIA_D / 2
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dy = abs(vy - p[3]) - p[5] / 2 - VIA_D / 2
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d = math.hypot(max(dx, 0), max(dy, 0)) if (dx > 0 and dy > 0) else max(dx, dy)
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if d < CLR:
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return False
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for v in vias:
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if math.hypot(vx - v[0], vy - v[1]) < VIA_HOLE + DRILL:
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return False
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return True
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made, miss = [], []
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for p in gnd:
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px, py, w, h = p[2], p[3], p[4], p[5]
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if any(math.hypot(px - v[0], py - v[1]) < max(w, h) / 2 + 0.3 for v in vias if v[2] == 'GND'):
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continue # 脚上已经有孔
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cand = [(0.0, px, py)]
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k = 1
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while k * STEP <= MAX_OUT + max(w, h) / 2:
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r = k * STEP
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for ang in range(0, 360, 15):
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vx = round(px + r * math.cos(math.radians(ang)), 4)
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vy = round(py + r * math.sin(math.radians(ang)), 4)
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dx, dy = abs(vx - px) - w / 2, abs(vy - py) - h / 2
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out = math.hypot(max(dx, 0), max(dy, 0))
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if out <= MAX_OUT:
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cand.append((r, vx, vy))
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k += 1
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got = None
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for _r, vx, vy in cand:
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if free(vx, vy):
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got = (vx, vy)
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break
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if got:
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made.append([got[0], got[1], 'GND'])
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vias.append((got[0], got[1], 'GND'))
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print(u' %s.%s (%.2f,%.2f) → 孔 (%.2f,%.2f)' % (p[0], p[1], px, py, got[0], got[1]))
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else:
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miss.append(u'%s.%s (%.2f,%.2f)' % (p[0], p[1], px, py))
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print(u'\n要补 %d 个孔；找不到落点 %d 只' % (len(made), len(miss)))
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for t in miss:
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print(u' ⛔ ' + t)
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if not made or '--push' not in sys.argv:
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return
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from eda import run
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r = run("""
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await eda.dmt_EditorControl.openDocument('%s');
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await new Promise(r=>setTimeout(r,2500));
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const V = %s, MIL = %s;
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let n = 0;
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for (const [x, y, net] of V) {
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try { await eda.pcb_PrimitiveVia.create(net, x*MIL, y*MIL, %s*MIL, %s*MIL); n++; } catch (e) {}
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}
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await eda.pcb_Document.save();
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return {made: n, now: (await eda.pcb_PrimitiveVia.getAll()||[]).length};
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""" % (PCB, json.dumps(made), MIL, VIA_HOLE, VIA_D), timeout=600)
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print(json.dumps(r.get('result'), ensure_ascii=False))
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if __name__ == '__main__':
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main()
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