R2:底板 / 刀片布局布线脚本、快照、截图与规划文档更新(含外壳、打印件、布线归档)
Co-Authored-By: Claude Opus 5.5 <[email protected]>
这个提交包含在:
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import json,sys,os
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sys.path.insert(0,'.claude')
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from eda import run
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page=sys.argv[1]
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r=run("""
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await eda.dmt_EditorControl.openDocument('%s'); await new Promise(r=>setTimeout(r,1200));
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const cur=(await eda.dmt_Schematic.getCurrentSchematicPageInfo()).name;
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const parts=[],ports=[],flags=[];
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for (const c of await eda.sch_PrimitiveComponent.getAll()){
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const t=c.getState_ComponentType();
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if (t==='part'){ const ps=await c.getAllPins(); parts.push([c.getState_Designator(),Math.round(c.getState_X()),Math.round(c.getState_Y()),c.getState_Rotation(),ps.map(p=>[p.getState_PinNumber(),Math.round(p.getState_X()),Math.round(p.getState_Y())])]); }
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else if (t==='netport') ports.push([c.getState_Net(),Math.round(c.getState_X()),Math.round(c.getState_Y()),c.getState_Rotation(),c.getState_Component().name]);
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else if (t==='netflag') flags.push([c.getState_Net(),Math.round(c.getState_X()),Math.round(c.getState_Y()),c.getState_Rotation()]);
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}
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const wires=(await eda.sch_PrimitiveWire.getAll()).map(w=>w.getState_Line().map(Math.round));
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const texts=[];
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return {cur,parts,ports,flags,wires,texts};
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"""%page, timeout=300)
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assert r.get('success'), json.dumps(r,ensure_ascii=False)[:500]
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out=r['result']
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json.dump(out,open('.claude/_tmp_page_%s.json'%page,'w',encoding='utf-8'),ensure_ascii=False)
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print('page',out['cur'],'parts',len(out['parts']),'ports',len(out['ports']),'flags',len(out['flags']),'wires',len(out['wires']),'texts',len(out['texts']))
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for p in out['parts']: print(' PART',p[0],p[1],p[2],p[3],p[4])
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for p in out['ports']: print(' PORT',p)
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for f in out['flags']: print(' FLAG',f)
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