kicad：EasyEDA→KiCad 工程（Board1/Board2）、库、脚本与评审文档（IC 引脚、风扇、热、EDL 供电、布局规则）

Co-Authored-By: Claude Opus 5.5 <[email protected]>

kicad/scripts/verify_pcb2_topology.py

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+"""Validate the declared Board2 Hub/USB topology before routing."""
+import json
+from pathlib import Path
+import pcbnew
+
+ROOT = Path(__file__).resolve().parents[1]
+BOARD_PATH = ROOT / "PhoneRail-Board2" / "PhoneRail-Board2.kicad_pcb"
+TOPOLOGY = ROOT / "pcb2-usb-topology.json"
+
+def main():
+    board = pcbnew.LoadBoard(str(BOARD_PATH))
+    topo = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
+    refs = {f.GetReference(): f for f in board.GetFootprints()}
+    required = ["J23", "U32", "J31", "J32"]
+    missing = [r for r in required if r not in refs]
+    assert not missing, f"missing required footprints: {missing}"
+    report = {"status": "PASS", "required": required, "missing": missing,
+              "tracks": len(board.GetTracks()), "nets": {}}
+    for ref in required:
+        nets = sorted({p.GetNetname() for p in refs[ref].Pads() if p.GetNetCode() > 0})
+        report["nets"][ref] = nets
+    assert report["nets"]["J23"], "J23 has no assigned nets"
+    assert report["nets"]["U32"], "U32 has no assigned nets"
+    out = ROOT / "out" / "pcb2-topology"
+    out.mkdir(parents=True, exist_ok=True)
+    (out / "verification.json").write_text(json.dumps(report, indent=2) + "\n", encoding="utf-8")
+    print(json.dumps(report, indent=2))
+
+if __name__ == "__main__":
+    main()