kicad：EasyEDA→KiCad 工程（Board1/Board2）、库、脚本与评审文档（IC 引脚、风扇、热、EDL 供电、布局规则）
Co-Authored-By: Claude Opus 5.5 <[email protected]>
这个提交包含在：
zhou yang
子模块 kicad/PhoneRail-Board1/.history 已添加到 034fdc79e1
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文件差异内容过多而无法显示
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文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
加载差异
文件差异内容过多而无法显示
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文件差异内容过多而无法显示
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|
||||
(version 1)
|
||||
# F.Cu horizontal, B.Cu vertical. Direction and explicit pair checks:
|
||||
# scripts/verify_pcb_layout.py + pcb-routing-rules.json.
|
||||
# Net names are unchanged; DP/DM suffixes are not presumed native pairs.
|
||||
(rule "R2 inner layers reserved for reference and power zones"
|
||||
(condition "A.Layer == 'In1.Cu' || A.Layer == 'In2.Cu'")
|
||||
(constraint disallow track))
|
||||
(rule "R2 USB differential target - requires recognized pair"
|
||||
(condition "A.hasNetclass('USB90')")
|
||||
(constraint track_width (min 0.15mm) (opt 0.28mm) (max 0.30mm))
|
||||
(constraint diff_pair_gap (min 0.15mm) (opt 0.18mm) (max 0.21mm))
|
||||
(constraint diff_pair_uncoupled (max 5mm))
|
||||
(constraint skew (max 0.5mm)))
|
||||
(rule "R2 switch copper stays on component side with no vias"
|
||||
(condition "A.hasNetclass('SWITCH')")
|
||||
(constraint disallow via)
|
||||
(constraint length (max 12mm)))
|
||||
(rule "R2 feedback and oscillator do not change layers"
|
||||
(condition "A.hasNetclass('FEEDBACK') || A.hasNetclass('CLOCK_LOCAL')")
|
||||
(constraint disallow via)
|
||||
(constraint length (max 15mm)))
|
||||
(rule "R2 switch tracks isolated from sensitive nets"
|
||||
(condition "A.Type == 'Track' && A.hasNetclass('SWITCH') && (B.hasNetclass('FEEDBACK') || B.hasNetclass('ANALOG') || B.hasNetclass('USB90') || B.hasNetclass('CLOCK_LOCAL'))")
|
||||
(constraint clearance (min 0.5mm)))
|
||||
(rule "R2 ordinary vias stay outside SMD lands"
|
||||
(condition "A.Type == 'Via' && B.Type == 'Pad' && B.Pad_Type == 'SMD'")
|
||||
(constraint physical_clearance (min 0.1mm)))
|
||||
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||||
{
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"board": {
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"shapes": 1.0,
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"lockedItems": false,
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"otherItems": true,
|
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"pads": true,
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"text": true,
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"tracks": true,
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"vias": true,
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"zones": true
|
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},
|
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"visible_items": [
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"vias",
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"footprints_front",
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"footprints_back",
|
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"footprint_values",
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"footprint_references",
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"tracks",
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"drc_errors",
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"drawing_sheet",
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"bitmaps",
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"pads",
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"zones",
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"locked_item_shadows",
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"conflict_shadows",
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"shapes",
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"board_outline_area",
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"ly_points"
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],
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"zone_display_mode": 0
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"git": {
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"integration_disabled": false,
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},
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"meta": {
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"filename": "PhoneRail-Board1.kicad_prl",
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"version": 5
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"custom_group_rules": [],
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"images": true,
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"labels": true,
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"lockedItems": false,
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"otherItems": true,
|
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"pins": true,
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"ruleAreas": true,
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"symbols": true,
|
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"text": true,
|
||||
"wires": true
|
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}
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}
|
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}
|
||||
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||||
(kicad_sch
|
||||
(version 20260306)
|
||||
(generator "eeschema")
|
||||
(generator_version "10.0")
|
||||
(uuid "66bff2c0-3126-52cb-9306-39c53f9b5560")
|
||||
(paper "A4")
|
||||
(title_block
|
||||
(title "PhoneRail-Board1")
|
||||
(comment 1 "由 EasyEDA 工程「五路手机直供电源板」自动转换")
|
||||
)
|
||||
(lib_symbols)
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|
||||
@@ -0,0 +1,6 @@
|
||||
(fp_lib_table
|
||||
(version 7)
|
||||
(lib (name "PhoneRail")(type "KiCad")(uri "${KIPRJMOD}/../lib/PhoneRail.pretty")(options "")(descr "PhoneRail 由 EasyEDA 转换"))
|
||||
(lib (name "PhoneRail-Fan") (type "KiCad") (uri "${KIPRJMOD}/../lib/PhoneRail-Fan.pretty") (options "") (descr "Four-wire prototype additions"))
|
||||
(lib (name "PhoneRail-Mechanical") (type "KiCad") (uri "${KIPRJMOD}/../lib/PhoneRail-Mechanical.pretty") (options "") (descr "R1 mechanical anchors"))
|
||||
)
|
||||
@@ -0,0 +1,5 @@
|
||||
(sym_lib_table
|
||||
(version 7)
|
||||
(lib (name "PhoneRail")(type "KiCad")(uri "${KIPRJMOD}/../lib/PhoneRail.kicad_sym")(options "")(descr "PhoneRail 由 EasyEDA 转换"))
|
||||
(lib (name "PhoneRail-Fan") (type "KiCad") (uri "${KIPRJMOD}/../lib/PhoneRail-Fan.kicad_sym") (options "") (descr "Four-wire prototype additions"))
|
||||
)
|
||||
在新工单中引用
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