初始导入：PhoneRail 五路手机直供电源板
原理图/PCB 已在 EasyEDA 里做到 12 页跨页 0 漏接，固件刚完成骨架包 A1。 这次是把已有的一切一次性纳入版本控制，没有改动任何设计内容。 纳入： - 设计与需求文档、PROGRESS.md、小米8 参考原理图 PDF 与追脚脚本 - .claude/ 下的 EasyEDA 桥接工具链与几何/网表缓存（eda-parts.json、 pcb-parts.json、pcb-pads.json、p2-ch1.json 等，是重画各页的唯一事实来源） - 117 张验证截图（本项目所有方向问题都是靠人眼看截图发现的，属于证据不是垃圾） - firmware/ 的 A1 骨架与 site/ 文档站源码 .gitignore 排除：构建产物（firmware/build、host/build、sdkconfig）、 site/node_modules、__pycache__、桥接日志 _bridge.log、脚本自标的 *.stale。 .gitattributes 默认 `* -text`：现有 .py/.json 大多是 CRLF，原样存， 不让 git 重写行尾。唯一例外是 *.sh 强制 LF —— 带 \r 的 shell 脚本 bash 跑不了。 Co-Authored-By: Claude Opus 5 <[email protected]> Claude-Session: https://claude.ai/code/session_01QYuExfgyYa6DzRRcUso8M8
这个提交包含在：
zhou yang
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# -*- coding: utf-8 -*-
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u"""把 Inner1 上**真正铺出来的铜**读回来栅格化，量连通性与最窄断面。
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/c/Python314/python .claude/inner1_verify.py [--grid 0.05]
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## 为什么不能只看 `pcb2_pour.py --verify` 打印的「段数」
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`getState_PourFills()` 把一块铜面吐成十几个 fill，**那多半是切块不是断开**：
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相邻块共边。所以「17 段」既可能是一整块被切碎，也可能真碎成 17 座孤岛，
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段数本身分辨不出来。唯一靠得住的判据是**把所有环画进同一张栅格再做连通域**。
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`inner1_check.py` 是**下发前**按 ISLANDS 多边形 + 反焊盘自己算的（预测），
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本脚本是**下发后**按 EDA 实际吐出来的铜算的（实测）。两个都要过。
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⚠️ 环的格式是 `x1 y1 'L' x2 y2 ... 'ARC' 角度 ex ey ...`，
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'ARC' 后面第一个数是**角度不是坐标**；这里按起点/终点/张角反解圆心，
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再按 <=5° 细分成折线 —— 直接把弧当弦会把反焊盘算大、低估颈宽。
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"""
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import json, math, os, sys
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HERE = os.path.dirname(os.path.abspath(__file__))
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sys.path.insert(0, HERE)
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from eda import run
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from pcb2_pour import ISLANDS, PCB, MIL, body_bbox
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U10MIL = 3.9370078740157477 # getState_PourFills() 的坐标单位：10 mil
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NECK_MIN = 7.0
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JS = u"""
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await eda.dmt_EditorControl.openDocument('%s');
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await new Promise(r=>setTimeout(r,1800));
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const byId = {};
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for (const p of await eda.pcb_PrimitivePour.getAll())
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byId[p.getState_PrimitiveId()] = [String(p.getState_PourName()||''), p.getState_Net(), p.getState_Layer()];
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const out = {};
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for (const q of await eda.pcb_PrimitivePoured.getAll()) {
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const info = byId[q.getState_PourPrimitiveId()]; if (!info) continue;
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let f = []; try { f = q.getState_PourFills() || []; } catch (e) {}
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const rings = [];
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let spokes = 0;
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for (const seg of f) {
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const cp = (seg.path && seg.path.complexPolygon) || [];
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// fill=false 的 seg 是**热焊盘十字花的辐条**（描边折线，lineWidth 一般 0.254），
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// 不是填充区。出现它就说明这块铜面的焊盘连接方式退回了「十字花」。
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if (seg.fill === false) { spokes += cp.length; continue; }
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for (const r of cp) rings.push(r);
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}
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out[info[0]] = {net: info[1], layer: info[2], rings: rings, spokes: spokes, nfill: f.length};
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}
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return out;
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""" % PCB
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def ring_to_poly(ring):
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u"""一个环 -> 折线点列（mm）。ARC 按 <=5° 细分。"""
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pts, i = [], 0
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cur = None
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while i < len(ring):
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v = ring[i]
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if v == 'L':
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i += 1
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continue
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if v == 'ARC':
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i += 1
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ang = ring[i]
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ex, ey = ring[i + 1], ring[i + 2]
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i += 3
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x0, y0 = cur
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th = math.radians(ang)
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mx, my = (x0 + ex) / 2.0, (y0 + ey) / 2.0
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dx, dy = ex - x0, ey - y0
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c = math.hypot(dx, dy)
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if c < 1e-9 or abs(math.sin(th / 2.0)) < 1e-9:
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pts.append((ex, ey))
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cur = (ex, ey)
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continue
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R = c / (2.0 * math.sin(th / 2.0)) # 带符号
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d = math.sqrt(max(R * R - (c / 2.0) ** 2, 0.0)) * (1 if R > 0 else -1)
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ox, oy = -dy / c, dx / c # 左法向
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ccx, ccy = mx + ox * d, my + oy * d
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a0 = math.atan2(y0 - ccy, x0 - ccx)
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n = max(2, int(abs(ang) / 5.0) + 1)
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for k in range(1, n + 1):
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a = a0 + th * k / n
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pts.append((ccx + abs(R) * math.cos(a), ccy + abs(R) * math.sin(a)))
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cur = (ex, ey)
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continue
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x, y = ring[i], ring[i + 1]
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i += 2
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pts.append((x, y))
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cur = (x, y)
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return [(x / U10MIL, y / U10MIL) for x, y in pts]
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def raster(polys, g):
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u"""所有环画进一张栅格，奇偶填充（外环填、内环挖）。"""
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xs = [p[0] for q in polys for p in q]
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ys = [p[1] for q in polys for p in q]
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x0, x1, y0, y1 = min(xs) - g, max(xs) + g, min(ys) - g, max(ys) + g
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nx = int((x1 - x0) / g) + 1
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ny = int((y1 - y0) / g) + 1
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edges = []
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for q in polys:
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for k in range(len(q)):
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a, b = q[k], q[(k + 1) % len(q)]
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if a[1] != b[1]:
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edges.append((a, b))
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grid = [bytearray(nx) for _ in range(ny)]
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for j in range(ny):
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y = y0 + (j + 0.5) * g
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cr = []
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for (ax, ay), (bx, by) in edges:
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if (ay > y) != (by > y):
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cr.append(ax + (bx - ax) * (y - ay) / (by - ay))
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cr.sort()
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row = grid[j]
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for t in range(0, len(cr) - 1, 2): # 奇偶填充
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i0 = max(0, int(math.ceil((cr[t] - x0) / g - 0.5)))
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i1 = min(nx - 1, int(math.floor((cr[t + 1] - x0) / g - 0.5)))
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for i in range(i0, i1 + 1):
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row[i] = 1
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return grid, x0, y0, nx, ny
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def components(grid, nx, ny):
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lab = [[0] * nx for _ in range(ny)]
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k, sizes = 0, {}
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for j in range(ny):
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for i in range(nx):
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if not grid[j][i] or lab[j][i]:
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continue
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k += 1
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st = [(j, i)]
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lab[j][i] = k
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n = 0
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while st:
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a, b = st.pop()
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n += 1
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for da, db in ((1, 0), (-1, 0), (0, 1), (0, -1)):
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p, q = a + da, b + db
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if 0 <= p < ny and 0 <= q < nx and grid[p][q] and not lab[p][q]:
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lab[p][q] = k
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st.append((p, q))
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sizes[k] = n
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return lab, sizes
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def main():
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g = 0.05
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if '--grid' in sys.argv:
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g = float(sys.argv[sys.argv.index('--grid') + 1])
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r = run(JS, timeout=240)
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if not r.get('success'):
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sys.exit(u'读回失败: ' + json.dumps(r, ensure_ascii=False)[:400])
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data = r['result']
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pads = json.load(open(os.path.join(HERE, '_pcb2_pads_full.json'), encoding='utf-8'))
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vias = json.load(open(os.path.join(HERE, '_pcb2_vias.json'), encoding='utf-8'))
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print(u'Inner1 实测铜面校核（栅格 %.2f mm，颈宽下限 %.1f mm）' % (g, NECK_MIN))
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allok = True
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for name, net, _m, _n in ISLANDS:
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key = u'%s-INNER1' % name
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d = data.get(key)
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if not d:
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print(u' %-12s [!!] 没读到这块铜面' % key)
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allok = False
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continue
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if d.get('spokes'):
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print(u' %-12s [!!] 有 %d 条十字花辐条 —— 这块铜面的焊盘连接方式不是「全连接」，'
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u'4 A 只能从 0.254 mm 的辐条里过。去 pcb2_rules.py 看 PLANE-DIRECT 有没有指派上。'
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% (key, d['spokes']))
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allok = False
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polys = [p for p in (ring_to_poly(rg) for rg in d['rings']) if len(p) >= 3]
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grid, x0, y0, nx, ny = raster(polys, g)
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lab, sizes = components(grid, nx, ny)
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main_k = max(sizes, key=sizes.get) if sizes else 0
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area = sizes.get(main_k, 0) * g * g
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tot = sum(sizes.values()) * g * g
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bad, own = [], 0
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for ref, num, pnet, layer, px, py, shape, hole in pads:
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if pnet != net or layer not in (12, 15):
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continue
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own += 1
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px, py = px / MIL, py / MIL
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rad = max(shape[1], shape[2] if len(shape) > 2 and isinstance(shape[2], (int, float)) else shape[1])
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rr = int((rad / MIL / 2.0 + 0.35) / g) + 1
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i, j, hit = int((px - x0) / g), int((py - y0) / g), False
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for q in range(max(0, j - rr), min(ny, j + rr + 1)):
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for p in range(max(0, i - rr), min(nx, i + rr + 1)):
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if lab[q][p] == main_k:
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hit = True
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break
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if hit:
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break
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if not hit:
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bad.append('%s.%s' % (ref, num))
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# ⚠️ 焊盘之外，**本网的过孔也必须落在主域里**：贴片电容全靠这一个孔接岛
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# （`pcb2_vo_vias.py` 打的 25 个）。只查焊盘的话，孔掉进边角碎片里没人发现。
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nvia = 0
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for vnet, vx, vy, dia, _hole in vias:
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if vnet != net:
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continue
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nvia += 1
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vx, vy = vx / MIL, vy / MIL
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rr = int((dia / MIL / 2.0 + 0.35) / g) + 1
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i, j, hit = int((vx - x0) / g), int((vy - y0) / g), False
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for q in range(max(0, j - rr), min(ny, j + rr + 1)):
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for pp in range(max(0, i - rr), min(nx, i + rr + 1)):
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if lab[q][pp] == main_k:
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hit = True
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break
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if hit:
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break
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if not hit:
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bad.append(u'过孔(%.2f,%.2f)' % (vx, vy))
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# v2：颈宽只在走廊主体里量（穿筋的颈 3 mm 只走纹波电流，§25.16）
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rx0, ry0, rx1, ry1 = body_bbox(_m)
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# 边界行只剩铺铜内缩后的一丝铜（实测 2.8 = 穿筋的颈），各缩 0.15 再量
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rx0, ry0, rx1, ry1 = rx0 + 0.15, ry0 + 0.15, rx1 - 0.15, ry1 - 0.15
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rowsY = [t for t in ((sum(1 for i in range(nx) if lab[j][i] == main_k and rx0 <= x0 + (i + 0.5) * g <= rx1) * g,
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y0 + (j + 0.5) * g)
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for j in range(ny) if ry0 <= y0 + (j + 0.5) * g <= ry1) if t[0] > 0]
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colsX = [t for t in ((sum(1 for j in range(ny) if lab[j][i] == main_k and ry0 <= y0 + (j + 0.5) * g <= ry1) * g,
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x0 + (i + 0.5) * g)
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for i in range(nx) if rx0 <= x0 + (i + 0.5) * g <= rx1) if t[0] > 0]
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my, mx = min(rowsY), min(colsX)
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ok = (not bad) and my[0] >= NECK_MIN and mx[0] >= NECK_MIN
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allok = allok and ok
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print(u' %-12s %-7s %d 环 / %d 连通域，主域 %.0f mm²（占本网铜的 %.1f%%）'
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% (key, net, len(polys), len(sizes), area, 100.0 * area / tot if tot else 0))
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print(u' %d 焊盘 + %d 过孔 %s 最窄横断面 %5.2f @ y=%.2f 最窄纵断面 %5.2f @ x=%.2f %s'
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% (own, nvia, u'全在主域 ✔' if not bad else u'✘ 掉队: ' + ' '.join(bad),
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my[0], my[1], mx[0], mx[1], u'✅' if ok else u'❌'))
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for key in (u'GND-INNER1', u'GND-INNER2'):
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d = data.get(key)
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if d:
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print(u' %-12s %-7s %d 环' % (key, d['net'], len(d['rings'])))
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print(u'%s' % (u'实测全部通过。' if allok else u'!! 实测有不达标的岛。'))
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return 0 if allok else 1
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if __name__ == '__main__':
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sys.exit(main())
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